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PINS Is Next Step in Software Revolution of Data Center Networking

May 26, 2021
Reshma Sudarshan
Reshma Sudarshan About the author

Contributed by Reshma Sudarshan, Director Applications Engineering, Intel

At the 2021 P4 Workshop, engineering leaders from Google and Intel presented on a new standards-based way to extend software defined networking (SDN) into a P4-programmable device. This is big news because one of the significant advantages of P4 is the ability to host network functions in the fabric, and to allow for remote software control of these functions.

The work on P4 integrated networking stack (PINS) is important to a wide range of networks because it makes it possible to use SDN (and an external controller) to dynamically add new advanced functions to a traditional routed network. The project is hosted by the Open Networking Foundation (ONF), and has recently welcomed major networking companies as partners  – most of whom have shown live demos of their PINS implementations.

The Impact of SDN

To understand why PINS is an important development, we first have to understand the impact of SDN on the network.

In very large networks, data packets go from ingress to egress by following route decisions made independently by tens or hundreds of switches, routers, or other network devices. At each hop, the network device calculates the best, least-congested path to the next network element. But it has limited visibility beyond that next hop, so it cannot optimize the complete path for that data packet. For example, it could be sending a packet on a path that has significant downstream congestion.

SDN takes that network decision making – the control plane – out of the network elements and makes it external with a global view of the entire end-to-end network of all traffic flows. SDN also offers scale-out data centers and telecom networks a way to streamline massive data flows which improves throughput and lowers latency.  But to date, leveraging SDN has meant the traditional routing protocols are no longer used, and this is a bigger change than some organizations have been willing to take on.

Enter P4 Switching

At about the same time SDN was becoming mainstream, the P4 initiative was underway. The primary goal of P4 was to bring programmability to the network data plane. Traditionally, switch ASICS have been monolithic devices able to run only the software that was built into the device when it was manufactured. On the contrary, P4 is a programming language that allows in-field updates to the switch, enabling support of new protocols or custom protocol stacks. The Intel® Tofino™ P4-programmable switch is the industry’s first Ethernet switch ASIC to be P4 programmable, although P4 can also run on FPGAs, network adapters, and software data plane implementations.

P4 uses a match-action logic that looks for certain characteristics in a packet header, and when a match is made, takes an action.  Use cases include a load balancer, firewall, or other network functions programmed into the fabric. This higher-level, match-action processing takes place within the switch’s data plane resulting in very low latency performance.

PINS Brings SDN to Traditional Routed Devices, Exposing the Benefits of P4

PINS brings SDN to an industry-adopted network operating system (SONiC), making it possible for external SDN controller to add new functionality on a network still using traditional routing protocols.  This has the potential to make SDN-controlled P4 data planes mainstream, because it means entire network architectures do not need to change for new functions to be layered into the net. Examples of such innovative extensions can include: load balancing, header optimizations, in-band telemetry (INT), congestion signally, etc.  The possibilities are very exciting.

PINS is a significant step toward providing “out of the box” support for SDN on all existing targets. PINS utilizes P4Runtime (P4RT) as the common abstraction interface in SONiC, which allows the SDN controller to communicate with the SONiC-managed programmable device. PINS enables the dynamic extension of the default switch abstraction interface (SAI) pipeline that allows for manipulation of new tables through SDN on the local switch. Extending the SONiC default pipeline for use cases like server load balancer can be realized using this architecture, which involves redirecting traffic selectively to backend servers based on a per-packet decision for the life of the session.

Networking is being revolutionized by software, and PINS furthers this trend by allowing P4 network elements to be controlled by SDN. The 2021 P4 Workshop is a milestone event for introducing PINS to the networking community and building an industry-wide understanding of what the software can do. We look forward to users writing applications using PINS in the secure SONiC environment.

Want more information? PINS descriptions and documentation is now starting to roll out. Please visit the PINS webpage on ONF’s website. You can also view slides and watch replays of the 2021 P4 Workshop presentations here, including my presentation titled, NDP with SONiC-PINS: A Low Latency and High-Performance Data Center Transport Integrated into SONiC.

 

ABOUT THE AUTHOR Reshma Sudarshan
Reshma SudarshanDirector Applications Engineering, Intel

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